#include "debug.h"
#include "../DDIC/AllDDIC.h"
#include "usbd_cdc_core.h"


u8 nt37700_bufferR[70];
u8 nt37700_bufferG[70];
u8 nt37700_bufferB[70];


void NT37700C_Inter_BIST(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{	
	//To selece Gray0 pattern in bist mode
	//CMD page0
	u8 PAGE0[7]={0x06,0xf0,0x55,0xaa,0x52,0x08,0x00};
	u8 cmd1[6]={0x05,0xee,0x87,0x78,0x02,0x40};
	u8 cmd2[9]={0x08,0xef,0x00,0x01,0xff,0xff,0xff,0x1f,0xff};	
	SSD2828_W_Reg(SigMode,channel,0xB7,(HS_B7_Data|0x0410)&0XFFFD);
	delay_ms(2);	
	
	SSD2828_W_Array(SigMode,channel,PAGE0,0);
	SSD2828_W_Array(SigMode,channel,cmd1,0);
	SSD2828_W_Array(SigMode,channel,cmd2,0);
	delay_ms(5);
	STM2PC_RM671xx(pdev,CDC_IN_EP,buffer,buffer[2]+3);   
}

void NT37700C_Write_Register(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
	  SSD2828_W_Reg(SigMode,channel,0xB7,(HS_B7_Data|0x0010)&0XFFfd);
    SSD2828_W_Array(SigMode,channel,buffer,2);                               

    delay_ms(5);
    SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
    buffer[4] = Uart_Error_None;
    buffer[5] = 0;
    STM2PC_RM671xx(pdev,CDC_IN_EP,buffer,buffer[2]+3);           //返回 写寄存器状态  ：ok  
}
void NT37700C_Read_Register(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
    u16 tmp;
    buffer[1]=0x03;
    SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080);                               
    SSD2828_W_Reg(SigMode,channel,0xC1,buffer[2]); //return package size                                
    SSD2828_W_Reg(SigMode,channel,0xC0,0x0001);
    buffer[0] = 0x01;
    buffer[1] = buffer[3];                        
    SSD2828_W_Array(SigMode,channel,buffer,0);
    delay_ms(5);  
    SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
    SSD2828_W_Cmd(SigMode,channel,0xFF);
    for(i=0;i<buffer[2]-1;i++)
    {
        SSD2828_W_Cmd(SigMode,channel,0xFA);		
        tmp=SPI3_Read_u16_Data(channel);
        buffer[4+i]=tmp>>8;
        buffer[5+i]=tmp;
        delay_ms(5);
        i++;
    }
		buffer[0]=0x4D;	
		buffer[1]=0x02;
    //SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
		SSD2828_W_Reg(SigMode,channel,0xB7,0x034b);
    STM2PC_RM671xx(pdev,CDC_IN_EP,buffer,buffer[2]+3);           //返回 读取的 寄存器数据  ：ok 
}

void NT37700C_Write_Gamma(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
    u8 buffer1[7];
    u8 i;
//	  u8 m = 0x00;
		u8 PAGE2[7]={0x06,0xf0,0x55,0xaa,0x52,0x08,0x02};	
		
		if((buffer[3]&0xFF)==0x00)
		{
			for( i = 0;i<24;i++)   //12个绑点                                                                                  
			{nt37700_bufferR[i]=buffer[i+5];}	    
			for( i = 0;i<24;i++)   //12个绑点                                                                                 
			{nt37700_bufferR[i+24]=buffer[i+5+24];}
			for( i = 0;i<22;i++)   //10个绑点	                                                                                  
			{nt37700_bufferR[i+48]=buffer[i+5+48];}
	  }
		else if((buffer[3]&0xFF)==0x42)
		{
			for( i = 0;i<24;i++)   //12个绑点                                                                                  
			{nt37700_bufferG[i]=buffer[i+5];}	    
			for( i = 0;i<24;i++)   //12个绑点                                                                                 
			{nt37700_bufferG[i+24]=buffer[i+5+24];}
			for( i = 0;i<22;i++)   //10个绑点	                                                                                  
			{nt37700_bufferG[i+48]=buffer[i+5+48];}
		}
		else if((buffer[3]&0xFF)==0x81)
		{
			for( i = 0;i<24;i++)   //12个绑点                                                                                  
			{nt37700_bufferB[i]=buffer[i+5];}	    
			for( i = 0;i<24;i++)   //12个绑点                                                                                 
			{nt37700_bufferB[i+24]=buffer[i+5+24];}
			for( i = 0;i<22;i++)   //10个绑点	                                                                                  
			{nt37700_bufferB[i+48]=buffer[i+5+48];}
	  }
		SSD2828_W_Reg(SigMode,channel,0xB7,(HS_B7_Data|0x0410)&0XFFFD);
		delay_ms(2);	
		
		if(buffer[4]==0x32) //aod gamma group;
		{
			buffer1[0] = 0x01; 
			buffer1[1] = 0x39;
			SSD2828_W_Array(SigMode,channel,buffer1,0);		
			buffer1[0] = 0x02; 
			buffer1[1] = 0x65; //idle
			buffer1[2] = 0x01; 
			SSD2828_W_Array(SigMode,channel,buffer1,0);					
		}
		else
		{
			buffer1[0] = 0x01; 
			buffer1[1] = 0x38;
			SSD2828_W_Array(SigMode,channel,buffer1,0);		
			buffer1[0] = 0x02; 
			buffer1[1] = 0x65;
			buffer1[2] = 0x00; 
			SSD2828_W_Array(SigMode,channel,buffer1,0);				
		}
		SSD2828_W_Array(SigMode,channel,PAGE2,0);	
		delay_ms(2);	
//	  buffer1[0] = 0x02;        
//    buffer1[1] = 0xCE;
//    buffer1[2] = 0x00;
//    SSD2828_W_Array(SigMode,channel,buffer1,0);		
		
	  buffer1[0] = 0x02;        
    buffer1[1] = 0xCC;
    buffer1[2] = 0x10;
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(1); 		
	  buffer1[0] = 0x02; 
		buffer1[1] = 0xBF;
		buffer1[2] = buffer[4]; //gamma_group_sel
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		delay_ms(1); 		
		SSD2828_W_Reg(SigMode,channel,0xBC,25); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB0); //GAMMA RED GROUP1
		for(i=0; i<24; i++)
		{
			SSD2828_W_Data(SigMode,channel,nt37700_bufferR[i]);	
		}				 
		
		SSD2828_W_Reg(SigMode,channel,0xBC,25); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB1); //GAMMA RED GROUP2
		for(i=0; i<24; i++)
		{
			SSD2828_W_Data(SigMode,channel,nt37700_bufferR[i+24]);	
		}				
		
		SSD2828_W_Reg(SigMode,channel,0xBC,23); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB2); //GAMMA RED GROUP3
		for(i=0; i<22; i++)
		{
			SSD2828_W_Data(SigMode,channel,nt37700_bufferR[i+48]);	
		}		
		delay_ms(2); 		
//---------------------------------------------------------------------		
		SSD2828_W_Reg(SigMode,channel,0xBC,25); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB3); //GAMMA RED GROUP1
		for(i=0; i<24; i++)
		{
			SSD2828_W_Data(SigMode,channel,nt37700_bufferG[i]);	
		}				 
		
		SSD2828_W_Reg(SigMode,channel,0xBC,25); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB4); //GAMMA RED GROUP2
		for(i=0; i<24; i++)
		{
			SSD2828_W_Data(SigMode,channel,nt37700_bufferG[i+24]);	
		}									 
		SSD2828_W_Reg(SigMode,channel,0xBC,23); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB5); //GAMMA RED GROUP3
		for(i=0; i<22; i++)
		{
			SSD2828_W_Data(SigMode,channel,nt37700_bufferG[i+48]);	
		}
		delay_ms(2); 		
//----------------------------------------------------------------------		
		SSD2828_W_Reg(SigMode,channel,0xBC,25); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB6); //GAMMA RED GROUP1
		for(i=0; i<24; i++)
		{
			SSD2828_W_Data(SigMode,channel,nt37700_bufferB[i]);	
		}				 	
		SSD2828_W_Reg(SigMode,channel,0xBC,25); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB7); //GAMMA RED GROUP2
		for(i=0; i<24; i++)
		{
			SSD2828_W_Data(SigMode,channel,nt37700_bufferB[i+24]);	
		}									 
		SSD2828_W_Reg(SigMode,channel,0xBC,23); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB8); //GAMMA RED GROUP3
		for(i=0; i<22; i++)
		{
			SSD2828_W_Data(SigMode,channel,nt37700_bufferB[i+48]);	
		}
		delay_ms(2); 	
	//---------------------------------------------------------		
		buffer1[0] = 0x02;        
		buffer1[1] = 0xCC;
		buffer1[2] = 0x30;
    SSD2828_W_Array(SigMode,channel,buffer1,0);		
//		delay_ms(1); 		
//	  buffer1[0] = 0x02;        
//    buffer1[1] = 0xCE;
//    buffer1[2] = 0x01;
//    SSD2828_W_Array(SigMode,channel,buffer1,0);		
//		delay_ms(5); 		
		SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);				
		delay_ms(2); 
    buffer[0]=0x4E;	//NT37700C
    buffer[1]=0x08;		
    buffer[4] = Uart_Error_None;
    buffer[5] = 0;
    STM2PC_RM671xx(pdev,CDC_IN_EP,buffer,buffer[2]+3);            //返回 写寄存器状态  ：ok  
}

void NT37700C_Gamma_Update(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
    u8 buffer1[7];
    u8 i;
//	  u8 m = 0x00;
		u8 PAGE2[7]={0x06,0xf0,0x55,0xaa,0x52,0x08,0x02};	
		
		SSD2828_W_Reg(SigMode,channel,0xB7,(HS_B7_Data|0x0410)&0XFFFD);
		delay_ms(5);			
		SSD2828_W_Array(SigMode,channel,PAGE2,0);	
		delay_ms(2);	
	  buffer1[0] = 0x02; 
		buffer1[1] = 0xBF;
		buffer1[2] = buffer[4]; //gamma_group_sel
		SSD2828_W_Array(SigMode,channel,buffer1,0);		
	  buffer1[0] = 0x02;        
    buffer1[1] = 0xCC;
    buffer1[2] = 0x30;
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
	  buffer1[0] = 0x02;        
    buffer1[1] = 0xCE;
    buffer1[2] = 0x00;
    SSD2828_W_Array(SigMode,channel,buffer1,0);		
		delay_ms(2);				
	
		SSD2828_W_Reg(SigMode,channel,0xBC,25); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB0); //GAMMA RED GROUP1
		for(i=0; i<24; i++)
		{
			SSD2828_W_Data(SigMode,channel,nt37700_bufferR[i]);	
		}				 
		
		SSD2828_W_Reg(SigMode,channel,0xBC,25); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB1); //GAMMA RED GROUP2
		for(i=0; i<24; i++)
		{
			SSD2828_W_Data(SigMode,channel,nt37700_bufferR[i+24]);	
		}				
		
		SSD2828_W_Reg(SigMode,channel,0xBC,23); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB2); //GAMMA RED GROUP3
		for(i=0; i<22; i++)
		{
			SSD2828_W_Data(SigMode,channel,nt37700_bufferR[i+48]);	
		}		
		delay_ms(2); 		
//---------------------------------------------------------------------		
		SSD2828_W_Reg(SigMode,channel,0xBC,25); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB3); //GAMMA RED GROUP1
		for(i=0; i<24; i++)
		{
			SSD2828_W_Data(SigMode,channel,nt37700_bufferG[i]);	
		}				 
		
		SSD2828_W_Reg(SigMode,channel,0xBC,25); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB4); //GAMMA RED GROUP2
		for(i=0; i<24; i++)
		{
			SSD2828_W_Data(SigMode,channel,nt37700_bufferG[i+24]);	
		}									 
		SSD2828_W_Reg(SigMode,channel,0xBC,23); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB5); //GAMMA RED GROUP3
		for(i=0; i<22; i++)
		{
			SSD2828_W_Data(SigMode,channel,nt37700_bufferG[i+48]);	
		}
		delay_ms(2); 		
//----------------------------------------------------------------------		
		SSD2828_W_Reg(SigMode,channel,0xBC,25); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB6); //GAMMA RED GROUP1
		for(i=0; i<24; i++)
		{
			SSD2828_W_Data(SigMode,channel,nt37700_bufferB[i]);	
		}				 	
		SSD2828_W_Reg(SigMode,channel,0xBC,25); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB7); //GAMMA RED GROUP2
		for(i=0; i<24; i++)
		{
			SSD2828_W_Data(SigMode,channel,nt37700_bufferB[i+24]);	
		}									 
		SSD2828_W_Reg(SigMode,channel,0xBC,23); 
		SSD2828_W_Cmd(SigMode,channel,0xBF);	
		SSD2828_W_Data(SigMode,channel,0xB8); //GAMMA RED GROUP3
		for(i=0; i<22; i++)
		{
			SSD2828_W_Data(SigMode,channel,nt37700_bufferB[i+48]);	
		}
		delay_ms(2); 	
	//---------------------------------------------------------			
	  buffer1[0] = 0x02;        
    buffer1[1] = 0xCE;
    buffer1[2] = 0x01;
    SSD2828_W_Array(SigMode,channel,buffer1,0);		
		delay_ms(10); 		
		
	  buffer1[0] = 0x02;        
    buffer1[1] = 0xCC;
    buffer1[2] = 0x00;
    SSD2828_W_Array(SigMode,channel,buffer1,0);
		delay_ms(2); 	
	  buffer1[0] = 0x02;        
    buffer1[1] = 0xCE;
    buffer1[2] = 0x00;
    SSD2828_W_Array(SigMode,channel,buffer1,0);				
		delay_ms(2); 		
		
		SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);				
		delay_ms(2); 
    buffer[0]=0x4E;	//NT37700C
    buffer[1]=0x03;		
    buffer[4] = Uart_Error_None;
    buffer[5] = 0;
    STM2PC_RM671xx(pdev,CDC_IN_EP,buffer,buffer[2]+3);            //返回 写寄存器状态  ：ok   
}

void NT37700C_Read_Gamma(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
			u8 buffer1[7];
			u16 tmp;
			u8 i,j;
			u8 PAGE2[7]={0x06,0xf0,0x55,0xaa,0x52,0x08,0x02};		
			SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
	    delay_ms(15);	
			SSD2828_W_Array(SigMode,channel,PAGE2,0); 
			delay_ms(5);	    
	
			buffer1[0] = 0x02;  	
			buffer1[1] = 0xBF;
			buffer1[2] = buffer[4]; //gamma_group_sel
			SSD2828_W_Array(SigMode,channel,buffer1,0);		        
	    SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080);
  
	    SSD2828_W_Reg(SigMode,channel,0xC1,0x0018); //返回个数设置	    
	    delay_ms(2);			 
			buffer1[0] = 0x02;
			if(buffer[3]==0x00)
					buffer1[1] = 0xB0; //GAMMA RED
			else if(buffer[3]==0x42)
					buffer1[1] = 0xB3; //GAMMA GREEN
			else if(buffer[3]==0x81)
					buffer1[1] = 0xB6; //GAMMA BLUE				
      SSD2828_W_Array(SigMode,channel,buffer1,0);		 
	    delay_ms(2);               
			SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
		  SSD2828_W_Cmd(SigMode,channel,0xFF);
		  delay_ms(2);		
			for(i=0;i<24;i++)
		  {
				  SSD2828_W_Cmd(SigMode,channel,0xFA);		
				  tmp=SPI3_Read_u16_Data(channel);
					if(buffer[3]==0x00)
					{				
							nt37700_bufferR[i]=tmp>>8;
							nt37700_bufferR[i+1]=tmp;
					}
					else if(buffer[3]==0x42)
					{
							nt37700_bufferG[i]=tmp>>8;
							nt37700_bufferG[i+1]=tmp;			
					}
					else if(buffer[3]==0x81)
					{
							nt37700_bufferB[i]=tmp>>8;
							nt37700_bufferB[i+1]=tmp;						
					}				
					delay_ms(5);
					i++;			
		  }			
			SSD2828_W_Reg(SigMode,channel,0xC1,0x0018); //返回个数设置	    
	    delay_ms(2);				 
			buffer1[0] = 0x02;        
			if(buffer[3]==0x00)
					buffer1[1] = 0xB1; //GAMMA RED
			else if(buffer[3]==0x42)
					buffer1[1] = 0xB4; //GAMMA GREEN
			else if(buffer[3]==0x81)
					buffer1[1] = 0xB7; //GAMMA BLUE		         
      SSD2828_W_Array(SigMode,channel,buffer1,0);		 
	    delay_ms(2);                
			SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
		  SSD2828_W_Cmd(SigMode,channel,0xFF);
		  delay_ms(2);
			
			for(i=0;i<24;i++)
		  {
				  SSD2828_W_Cmd(SigMode,channel,0xFA);		
				  tmp=SPI3_Read_u16_Data(channel);
					if(buffer[3]==0x00)
					{					
						nt37700_bufferR[i+24]=tmp>>8;
						nt37700_bufferR[i+25]=tmp;
					}
					else if(buffer[3]==0x42)
					{
						nt37700_bufferG[i+24]=tmp>>8;
						nt37700_bufferG[i+25]=tmp;				
					}
					else if(buffer[3]==0x81)
					{
						nt37700_bufferB[i+24]=tmp>>8;
						nt37700_bufferB[i+25]=tmp;				
					}					
			    delay_ms(5);
				  i++;			
		  }			
		  SSD2828_W_Reg(SigMode,channel,0xC1,0x0016); //返回个数设置	    
	    delay_ms(2);				 
			buffer1[0] = 0x02;        
			if(buffer[3]==0x00)
					buffer1[1] = 0xB2; //GAMMA RED
			else if(buffer[3]==0x42)
					buffer1[1] = 0xB5; //GAMMA GREEN
			else if(buffer[3]==0x81)
					buffer1[1] = 0xB8; //GAMMA BLUE		         
      SSD2828_W_Array(SigMode,channel,buffer1,0);		 
	    delay_ms(2);                
			SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
		  SSD2828_W_Cmd(SigMode,channel,0xFF);
		  delay_ms(2);
			
			for(i=0;i<22;i++)
		  {
				  SSD2828_W_Cmd(SigMode,channel,0xFA);		
				  tmp=SPI3_Read_u16_Data(channel);
					if(buffer[3]==0x00)
					{	
						nt37700_bufferR[i+48]=tmp>>8;
						nt37700_bufferR[i+49]=tmp;
					}
					else if(buffer[3]==0x42)
					{	
						nt37700_bufferG[i+48]=tmp>>8;
						nt37700_bufferG[i+49]=tmp;
					}	
					else if(buffer[3]==0x81)
					{	
						nt37700_bufferB[i+48]=tmp>>8;
						nt37700_bufferB[i+49]=tmp;
					}						
			    delay_ms(5);
				  i++;			
		  }		
			for(j=0;j<70;j++)
			{
				if(buffer[3]==0x00)				
					buffer[4+j]=nt37700_bufferR[j];	
				else if(buffer[3]==0x42)	
					buffer[4+j]=nt37700_bufferG[j];	
				else if(buffer[3]==0x81)
					buffer[4+j]=nt37700_bufferB[j];	
			}			
    buffer[0]=0x4E;	//NT37700C
    buffer[1]=0x09;
		
		delay_ms(15);
    STM2PC_RM671xx(pdev,CDC_IN_EP,buffer,buffer[2]+3);          //返回 读取的 Gamma数据  ：ok  		
    SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
}

void NT37700C_Gamma_OTP_Start(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
    u8 buffer1[10];
//	  u8 mtp_flag;
		u8 PAGE1[7]={0x06,0xf0,0x55,0xaa,0x52,0x08,0x01};	
		
//		u8 OTP_en_off[8]={0x07,0xED,0x00,0x00,0x00,0x00,0x00,0x00};
		u8 OTP_en_PAGE0[8]={0x07,0xED,0x7F,0x00,0x00,0x00,0x00,0x00};
	  u8 OTP_en_PAGE1[8]={0x07,0xED,0x80,0x0F,0x00,0x00,0x00,0x00};
	  u8 OTP_en_PAGE2[9]={0x08,0xED,0x00,0xE0,0x00,0x00,0x00,0x00,0x08};		
	  u8 OTP_en_PAGE3[8]={0x07,0xED,0x00,0x00,0x07,0x00,0x00,0x00};	
	  u8 OTP_en_PAGE4[8]={0x07,0xED,0x00,0x00,0x18,0x00,0x00,0x00};	
	  u8 OTP_en_PAGE5[8]={0x07,0xED,0x00,0x00,0x60,0x00,0x00,0x00};
	  u8 OTP_en_PAGE6[8]={0x07,0xED,0x00,0x00,0x80,0x00,0x00,0x00};		
	  u8 OTP_en_PAGE7[8]={0x07,0xED,0x00,0x00,0x00,0x03,0x00,0x00};		
	  u8 OTP_en_PAGE8[8]={0x07,0xED,0x00,0x00,0x00,0x0C,0x00,0x00};			
		
		u8 OTP_all_PAGE[9]={0x08,0xED,0xFF,0xEF,0xFF,0x0F,0x08,0x00,0x08};
			
	  SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
		delay_ms(15); 
    buffer1[0] = 0x01;
    buffer1[1] = 0x28;                    
    SSD2828_W_Array(SigMode,channel,buffer1,0); 
		delay_ms(10); 
		buffer1[0] = 0x01;
    buffer1[1] = 0x11;  	
    SSD2828_W_Array(SigMode,channel,buffer1,0); 
		delay_ms(120); 	
	  SSD2828_W_Array(SigMode,channel,PAGE1,0);//Enable CMD2 Page 1
		delay_ms(5); 
	  buffer1[0] = 0x03;
    buffer1[1] = 0xc9; 
	  buffer1[2] = 0x0c;
    buffer1[3] = 0x11; 	
    SSD2828_W_Array(SigMode,channel,buffer1,0);//VRGH_MTP[7:0] = 0x0F (6.2V)
		delay_ms(20); 
	  buffer1[0] = 0x04;
    buffer1[1] = 0xEB; 
	  buffer1[2] = 0x87;
    buffer1[3] = 0x78; 
	  buffer1[4] = 0x01;		
    SSD2828_W_Array(SigMode,channel,buffer1,0);//Enable Internal MTP Power 
		delay_ms(60); 	
	  buffer1[0] = 0x02;
    buffer1[1] = 0xCA; 
	  buffer1[2] = 0x01;		
    SSD2828_W_Array(SigMode,channel,buffer1,0); //PDSTB = 1
		delay_ms(20); 
		buffer1[0] = 0x03;
    buffer1[1] = 0xCA; 
	  buffer1[2] = 0x01;	
	  buffer1[3] = 0x02;	//PTM_RB[3:0] = 2 (Program Mode)
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		delay_ms(20); 

	
		if(buffer[3]==0x02)  //otp Gamma
		{	 
			  buffer1[0] = 0x02;        
				buffer1[1] = 0xCC;
				buffer1[2] = 0x30;
				SSD2828_W_Array(SigMode,channel,buffer1,0);		
				delay_ms(1); 		
				buffer1[0] = 0x02;        
				buffer1[1] = 0xCE;
				buffer1[2] = 0x01;
				SSD2828_W_Array(SigMode,channel,buffer1,0);		
				delay_ms(5);			
				SSD2828_W_Array(SigMode,channel,OTP_en_PAGE2,0);	
		}
		else if(buffer[3]==0xA0)  //otp ALL
		{
			SSD2828_W_Array(SigMode,channel,OTP_all_PAGE,0);	
		}
		else if(buffer[3]==0x00)  //otp PAGE 0
		{
 			SSD2828_W_Array(SigMode,channel,OTP_en_PAGE0,0);	
		}
		else if(buffer[3]==0x01)  //otp PAGE 1
		{	 
 			SSD2828_W_Array(SigMode,channel,OTP_en_PAGE1,0);	
		}
		else if(buffer[3]==0x03)  //otp PAGE 5
		{
  		SSD2828_W_Array(SigMode,channel,OTP_en_PAGE3,0);	
		}
		else if(buffer[3]==0x04)  //otp PAGE 4
		{		 
			SSD2828_W_Array(SigMode,channel,OTP_en_PAGE4,0);	
		}
		else if(buffer[3]==0x05)  //otp PAGE 5
		{
  		SSD2828_W_Array(SigMode,channel,OTP_en_PAGE5,0);	
		}
		else if(buffer[3]==0x06)  //otp PAGE 6
		{
   		SSD2828_W_Array(SigMode,channel,OTP_en_PAGE6,0);	
		}		
		else if(buffer[3]==0x07)  //otp PAGE 7
		{
   		SSD2828_W_Array(SigMode,channel,OTP_en_PAGE7,0);	
		}		
		else if(buffer[3]==0x08)  //otp PAGE 8
		{
   		SSD2828_W_Array(SigMode,channel,OTP_en_PAGE8,0);	
		}				
		delay_ms(50); 	 
		SSD2828_W_Array(SigMode,channel,PAGE1,0);//Enable CMD2 Page 1
		delay_ms(2);		
    buffer1[0] = 0x04;
    buffer1[1] = 0xEE;
    buffer1[2] = 0xA5;    
	  buffer1[3] = 0x5A;    
	  buffer1[4] = 0x3C;    
		SSD2828_W_Array(SigMode,channel,buffer1,0);			
		delay_ms(5000);//	x must be large than 3s if need program all page
	//	SSD2828_W_Array(SigMode,channel,OTP_en_off,0);		
//		buffer[1] = 0x0E;
		buffer[2] = 0x02;
		buffer[3] = Uart_Error_None;   //返回 OTP Gamma数据  ：OK
		buffer[4] = 0;
		STM2PC_RM671xx(pdev,CDC_IN_EP,buffer,buffer[2]+3);         
}
void NT37700C_QE1(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
	  u8 buffer1[4]; 
	  u16 tmp;
	u8 PAGE4[7] = {0x06,0xF0,0x55,0xAA,0x52,0x08,0x04};
	u8 REG_FF[6] = {0x05,0xFF,0xAA,0x55,0xA5,0x80};
//	u8 REG_B1[14] = {0x0D,0xB1,0x01,0xC1,0x03,0x0B,0xB9,0xAB,0x3B,0x6B,0x00,0x00,0x00,0x00};
//	u8 REG_6F[3] ={0x02,0x6F,0x09};
	//-----------------------------------------------------------		
	SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
	delay_ms(15); 		
	SSD2828_W_Array(SigMode,channel,PAGE4,0);
	delay_ms(5); 	
	SSD2828_W_Array(SigMode,channel,REG_FF,0);
	delay_ms(5); 	

	buffer1[0] = 0x02;
	buffer1[1] = 0xC2; 
	buffer1[2] = 0x14; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	 //F_R_EN = 1
//--------------------leave deep standby------------------------
	
	buffer1[0] = 0x02;
	buffer1[1] = 0xC3; 
	buffer1[2] = 0xAB; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);
	buffer1[0] = 0x02;		
	buffer1[1] = 0x6F; 
	buffer1[2] = 0x09; 
	SSD2828_W_Array(SigMode,channel,buffer1,0);	
	buffer1[0] = 0x02;		
	buffer1[1] = 0xC3; 
	buffer1[2] = 0x01; 
	SSD2828_W_Array(SigMode,channel,buffer1,0);	 	
	delay_ms(120);		
	buffer1[0] = 0x02;
	buffer1[1] = 0x6F; 
	buffer1[2] = 0x09; 
	SSD2828_W_Array(SigMode,channel,buffer1,0);	 	

	delay_ms(120);	
	buffer1[0] = 0x02;
	buffer1[1] = 0x6F; 
	buffer1[2] = 0x09; 
	SSD2828_W_Array(SigMode,channel,buffer1,0);	
	buffer1[0] = 0x02;		
	buffer1[1] = 0xC3; 
	buffer1[2] = 0x00; 
   SSD2828_W_Array(SigMode,channel,buffer1,0);	 	
//-----------------------Read status(Manul 03)----------------------------		
	buffer1[0] = 0x02;
	buffer1[1] = 0xC3; 
	buffer1[2] = 0x05; 
	SSD2828_W_Array(SigMode,channel,buffer1,0);	
	buffer1[0] = 0x02; 		
	buffer1[1] = 0x6F; 
	buffer1[2] = 0x09; 
	SSD2828_W_Array(SigMode,channel,buffer1,0);	 	
		buffer1[0] = 0x02;
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x04; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(120);
		buffer1[0] = 0x02;
	  buffer1[1] = 0x6F; 
	  buffer1[2] = 0x09; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);		
		buffer1[0] = 0x02;		
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x00; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);			
		buffer1[0] = 0x02;		
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x35; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02; 		
	  buffer1[1] = 0x6F; 
	  buffer1[2] = 0x09; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;		
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x04; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	 		
		delay_ms(120);
		buffer1[0] = 0x02;		
	  buffer1[1] = 0x6F; 
	  buffer1[2] = 0x09; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;		
	  buffer1[1] = 0xC3; 
	  buffer1[2] = 0x00; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	 	
		buffer1[0] = 0x02;		
	  buffer1[1] = 0x6F; 
	  buffer1[2] = 0x12; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(120);		
//------------------Write Enable(Manul 01)-----------------		
		buffer1[0] = 0x02;
		buffer1[1] = 0xC3; 
	  buffer1[2] = 0x06; 		
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;		
	  buffer1[1] = 0x6F; 
	  buffer1[2] = 0x09; 
	SSD2828_W_Array(SigMode,channel,buffer1,0);		
	buffer1[0] = 0x02;		
	buffer1[1] = 0xC3; 
	buffer1[2] = 0x01; 		
	SSD2828_W_Array(SigMode,channel,buffer1,0);		
	delay_ms(120);	
	buffer1[0] = 0x02;		
	buffer1[1] = 0x6F; 
	buffer1[2] = 0x09; 			
	SSD2828_W_Array(SigMode,channel,buffer1,0);		
	buffer1[0] = 0x02;	
	buffer1[1] = 0xC3; 
	buffer1[2] = 0x00; 			
	SSD2828_W_Array(SigMode,channel,buffer1,0);
//------------------Write Enable(Manul 02)-------------------		
	buffer1[0] = 0x02;
	buffer1[1] = 0xC3; 
	buffer1[2] = 0x01; 			
	SSD2828_W_Array(SigMode,channel,buffer1,0);		
		buffer1[0] = 0x02;		
		buffer1[1] = 0x6F; 
	  buffer1[2] = 0x07; 			
	  SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;	
		buffer1[1] = 0xC3; 
	  buffer1[2] = 0x02; 			
	  SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;	
		buffer1[1] = 0x6F; 
	  buffer1[2] = 0x09; 			
	  SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;		
		buffer1[1] = 0xC3; 
	  buffer1[2] = 0x02; 			
	  SSD2828_W_Array(SigMode,channel,buffer1,0);		
		delay_ms(120);	
		buffer1[0] = 0x02;		
		buffer1[1] = 0x6F; 
	  buffer1[2] = 0x09; 			
	  SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x02;		
		buffer1[1] = 0xC3; 
	  buffer1[2] = 0x00; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);
//-------------------Read status(Manul 03) ----------------	
		buffer1[0] = 0x02;
		buffer1[1] = 0xC3; 
	  buffer1[2] = 0x05; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x02;		
		buffer1[1] = 0x6F; 
	  buffer1[2] = 0x09; 			
	  SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;		
		buffer1[1] = 0xC3; 
	  buffer1[2] = 0x04; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);
		delay_ms(120);	
		buffer1[0] = 0x02;		
		buffer1[1] = 0x6F; 
	  buffer1[2] = 0x09; 			
	  SSD2828_W_Array(SigMode,channel,buffer1,0);		
		buffer1[0] = 0x02;		
		buffer1[1] = 0xC3; 
	  buffer1[2] = 0x00; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x02;		
		buffer1[1] = 0xC3; 
	  buffer1[2] = 0x35; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);		
		buffer1[0] = 0x02;		
		buffer1[1] = 0x6F; 
	  buffer1[2] = 0x09; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x02;		
		buffer1[1] = 0xC3; 
	  buffer1[2] = 0x04; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);				
		delay_ms(120);
		buffer1[0] = 0x02;		
		buffer1[1] = 0x6F; 
	  buffer1[2] = 0x09; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
//-------------------------------------Read Flash ID :C8
		buffer1[0] = 0x02;										
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x9F; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;		
		buffer1[1] = 0x6F; 
		buffer1[2] = 0x09; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x04; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(120);
		buffer1[0] = 0x02;		
		buffer1[1] = 0x6F; 
		buffer1[2] = 0x09; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;		
		buffer1[1] = 0x6F; 
		buffer1[2] = 0x00; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);	
		
		
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080); 
		SSD2828_W_Reg(SigMode,channel,0xBC,0x0001); 
		SSD2828_W_Reg(SigMode,channel,0xC1,0x0002); //return package  
					 
		buffer1[0] = 0x01;
		buffer1[1] = 0xC3;
		SSD2828_W_Array(SigMode,channel,buffer1,0); 
		delay_ms(6);
		tmp=SSD2828_R_Reg(SigMode,channel,0xFF);
		buffer[4]=tmp;
		buffer[5]=tmp>>8;
		delay_ms(5);	
//--------------------------------------------------------		
		SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
}

void NT37700C_Erase_Flash(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
	u8 buffer1[4]; 
	u16 tmp;
	u8 PAGE4[7] = {0x06,0xF0,0x55,0xAA,0x52,0x08,0x04};	
	u8 REG_C3[9] = {0x08,0xC3,0xC7,0x00,0x00,0x00,0x00,0x00,0x00};
	u8 REG_C3_1[9] = {0x08,0xC3,0x03,0x00,0x00,0x08,0x00,0x0F,0xFA};
//	u8 REG_C3_2[10] = {0x09,0xC3,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF};
	
	SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
	delay_ms(15);	
//------------------leave deep standby-------------
	SSD2828_W_Array(SigMode,channel,PAGE4,0);	
	delay_ms(5);		
	buffer1[0] = 0x02;
	buffer1[1] = 0xC3; 
	buffer1[2] = 0xAB; 
	SSD2828_W_Array(SigMode,channel,buffer1,0);	
	buffer1[0] = 0x02;
	buffer1[1] = 0x6F; 
	buffer1[2] = 0x09; 
	SSD2828_W_Array(SigMode,channel,buffer1,0);	
	buffer1[0] = 0x02;		
	buffer1[1] = 0xC3; 
	buffer1[2] = 0x01; 
	SSD2828_W_Array(SigMode,channel,buffer1,0);				
	delay_ms(120);
	buffer1[0] = 0x02;			
	buffer1[1] = 0x6F; 
	buffer1[2] = 0x09; 
	SSD2828_W_Array(SigMode,channel,buffer1,0);	
	buffer1[0] = 0x02;		
	buffer1[1] = 0xC3; 
	buffer1[2] = 0x00; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	//F_MANU_O1=0
//-----------------Write Enable(Manul 01)--------------------	
		buffer1[0] = 0x02;	
    buffer1[1] = 0xC3; 
	  buffer1[2] = 0x06; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;			
    buffer1[1] = 0x6F; 
	  buffer1[2] = 0x09; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;			
    buffer1[1] = 0xC3; 
	  buffer1[2] = 0x01; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);				
		delay_ms(120);	
		buffer1[0] = 0x02;			
    buffer1[1] = 0x6F; 
	  buffer1[2] = 0x09; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;			
    buffer1[1] = 0xC3; 
	  buffer1[2] = 0x00; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);		
//---------------Write Status(Manul 02)---------------------
		buffer1[0] = 0x02;	
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x01; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;			
    buffer1[1] = 0x6F; 
	  buffer1[2] = 0x07; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;			
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x02; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);		
		buffer1[0] = 0x02;			
    buffer1[1] = 0x6F; 
	  buffer1[2] = 0x09; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;			
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x02; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);					
		delay_ms(120);
		buffer1[0] = 0x02;			
    buffer1[1] = 0x6F; 
	  buffer1[2] = 0x09; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);		
		buffer1[0] = 0x02;			
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);			
//----------------Write Enable(Manul 01)----------------------
		buffer1[0] = 0x02;	
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x06; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;	
    buffer1[1] = 0x6F; 
	  buffer1[2] = 0x09; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);		
		buffer1[0] = 0x02;			
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x01; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);			
		delay_ms(120);		
		buffer1[0] = 0x02;			
    buffer1[1] = 0x6F; 
	  buffer1[2] = 0x09; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);		
		buffer1[0] = 0x02;			
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
//-----------------Read Status(Manul 03)---------------------
		buffer1[0] = 0x02;	
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x05; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;			
    buffer1[1] = 0x6F; 
	  buffer1[2] = 0x09; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;			
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x04; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x02;			
    buffer1[1] = 0x6F; 
	  buffer1[2] = 0x09; 
    SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;			
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x35; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x02;			
		buffer1[1] = 0x6F; 
		buffer1[2] = 0x09; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x02;			
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x04; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;			
		buffer1[1] = 0x6F; 
		buffer1[2] = 0x09; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x02;			
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
//		buffer1[0] = 0x02;			
//		buffer1[1] = 0x6F; 
//		buffer1[2] = 0x12; 
//		SSD2828_W_Array(SigMode,channel,buffer1,0);		
//---------------Write Enable(Manul 01)-------------------
		buffer1[0] = 0x02;	
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x06; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;			
		buffer1[1] = 0x6F; 
		buffer1[2] = 0x09; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x01; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);			
		delay_ms(120);	
		buffer1[0] = 0x02;	
		buffer1[1] = 0x6F; 
		buffer1[2] = 0x09; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;			
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);			
//----------------Chip erase---------------------------
		SSD2828_W_Array(SigMode,channel,REG_C3,0);
		buffer1[0] = 0x02;
		buffer1[1] = 0x6F; 
		buffer1[2] = 0x09; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;			
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x01; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);			
		delay_ms(8000);		
		buffer1[0] = 0x02;			
		buffer1[1] = 0x6F; 
		buffer1[2] = 0x09; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);		
		buffer1[0] = 0x02;			
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);
//-------------------Data Read---------------------------		
		buffer1[0] = 0x02;	
		buffer1[1] = 0xC2; 
		buffer1[2] = 0x14; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);		
		buffer1[0] = 0x03; 		
		buffer1[1] = 0xB1; 
		buffer1[2] = 0x02; 
		buffer1[3] = 0x01; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);		
		SSD2828_W_Array(SigMode,channel,REG_C3_1,0);
		delay_ms(200);	
		buffer1[0] = 0x02; 
		buffer1[1] = 0x6F; 
		buffer1[2] = 0x09; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02;			
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x08; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);				
	  delay_ms(120);	
		buffer1[0] = 0x02;	
		buffer1[1] = 0x6F; 
		buffer1[2] = 0x09; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);			
		buffer1[0] = 0x02;			
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);		
		buffer1[0] = 0x02;			
		buffer1[1] = 0x6F; 
		buffer1[2] = 0x0A; 
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
//		SSD2828_W_Array(SigMode,channel,REG_C3_2,0);
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080); 
		SSD2828_W_Reg(SigMode,channel,0xBC,0x0001); 
		SSD2828_W_Reg(SigMode,channel,0xC1,0x0002); //return package  					 
		buffer1[0] = 0x01;
		buffer1[1] = 0xC3;
		SSD2828_W_Array(SigMode,channel,buffer1,0); 
		delay_ms(6);
		tmp=SSD2828_R_Reg(SigMode,channel,0xFF);	
		buffer[4]=tmp;
		buffer[5]=tmp>>8;		
		delay_ms(5);
    SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
}

void NT37700C_Program_Flash_Set(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
		u8 PAGE4[7] = {0x06,0xF0,0x55,0xAA,0x52,0x08,0x04};
		u8 PAGE0[7] = {0x06,0xF0,0x55,0xAA,0x52,0x08,0x00};
		u8 REG_B1[18] = {0x11,0xB1,0x01,0x01,0x03,0x0B,0xB9,0xAB,0x3B,0x6B,0x00,0xE4,0x02,0x19,0x00,0x82,0x00,0x00};	
	  u8 buffer1[6]; 
	  u16 tmp;				

		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
		delay_ms(15);	
//-----------------------Flash Auto Program Set---------------------			
		SSD2828_W_Array(SigMode,channel,PAGE4,0);		
		delay_ms(5);				
		SSD2828_W_Array(SigMode,channel,REG_B1,0);
		delay_ms(5);			
		buffer1[0] = 0x02; 			
		buffer1[1] = 0xB1; 
	  buffer1[2] = 0x01; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02; 			
		buffer1[1] = 0xC2; 
	  buffer1[2] = 0x54; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02; 			
		buffer1[1] = 0x6F; 
	  buffer1[2] = 0x01; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x03; 			
		buffer1[1] = 0xC7; 
	  buffer1[2] = 0x13; 	
	  buffer1[3] = 0x4D; 			
	  SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x02; 		
		buffer1[1] = 0x6F; 
	  buffer1[2] = 0x01; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);				
//----------------------------------------------------------
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080); 
		SSD2828_W_Reg(SigMode,channel,0xBC,0x0001);
		SSD2828_W_Reg(SigMode,channel,0xC1,0x0002); //return package  
	  SSD2828_W_Reg(SigMode,channel,0xC0,0x0001);				 
		buffer1[0] = 0x01;
		buffer1[1] = 0xC7;
		SSD2828_W_Array(SigMode,channel,buffer1,0); 
		delay_ms(6);
		SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
		tmp=SSD2828_R_Reg(SigMode,channel,0xFF);	
		buffer[4]=tmp;
		buffer[5]=tmp>>8;	
		delay_ms(6);	
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
		delay_ms(6);
//-------------------Demura Sram enable----------------------
		SSD2828_W_Array(SigMode,channel,PAGE0,0);	
		delay_ms(5);		
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC0; 
	  buffer1[2] = 0x36; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);	
//----------------------------------------------------------
		delay_ms(5);		
		SSD2828_W_Array(SigMode,channel,PAGE4,0);	
		delay_ms(5);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0x6F; 
	  buffer1[2] = 0x03; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(5);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC9; 
	  buffer1[2] = 0x02; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);		
		delay_ms(5);			
		buffer1[0] = 0x02; 		
		buffer1[1] = 0x6F;
	  buffer1[2] = 0x04; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);		
		delay_ms(5);	
//-------------------------READ---------------------------
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080); 
		SSD2828_W_Reg(SigMode,channel,0xBC,0x0001);
		SSD2828_W_Reg(SigMode,channel,0xC1,0x0002); //return package  	
 //   SSD2828_W_Reg(SigMode,channel,0xC0,0x0001);		
		buffer1[0] = 0x01;
		buffer1[1] = 0xC9;
		SSD2828_W_Array(SigMode,channel,buffer1,0); 
		delay_ms(6);
		SSD2828_W_Reg(SigMode,channel,0xD4,0x00FA);
		tmp=0;
		tmp=SSD2828_R_Reg(SigMode,channel,0xFF);	
		buffer[4]=tmp;
		buffer[5]=tmp>>8;			//AA 55 AA 55
		delay_ms(6);
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
		delay_ms(6);
//-------------------Demura Sram enable----------------------
	  buffer1[0] = 0x01; 		
		buffer1[1] = 0x11; 
	  SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(120);		
//------------------------read-----------------------------
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080); 
		SSD2828_W_Reg(SigMode,channel,0xC1,0x0001); //return package  				 
		buffer1[0] = 0x01;
		buffer1[1] = 0x0A;
		SSD2828_W_Array(SigMode,channel,buffer1,0); 
		delay_ms(6);
		tmp=SSD2828_R_Reg(SigMode,channel,0xFF);	
		buffer[4]=tmp;		 //9C
//-------------------Demura Sram enable----------------------
		//RAM Write BMPLD	"D:\MY_Project\NT37700C\GVO\Demura.bmp"
//		delay_ms(3000);
    SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
		delay_ms(5);	
}

void NT37700C_Program_Flash_Load(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{	
		u8 REG_C8[5] 	 = {0x04,0xC8,0xA5,0x5A,0x3C};	
		u8 REG_C3_1[5] = {0x04,0xC3,0x00,0x00,0x00};
		//u8 REG_C3_2[6] = {0x05,0xC3,0x13,0x47,0xF0,0x00};	
		//u8 REG_C3_2[6] = {0x05,0xC3,0x13,0x58,0xD0,0x00};	
		u8 REG_C3_2[6] = {0x05,0xC3,0x13,0x4C,0x28,0x00};	
		u8 PAGE4[7] = {0x06,0xF0,0x55,0xAA,0x52,0x08,0x04};
		u8 buffer1[6];	
		u16 tmp;		

		////----------------------------------------------------------
		//		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080); 
		//		SSD2828_W_Reg(SigMode,channel,0xBC,0x0001); 
		//		SSD2828_W_Reg(SigMode,channel,0xC1,0x0002); //return package  
		//					 
		//		buffer1[0] = 0x01;
		//		buffer1[1] = 0xAB;
		//		SSD2828_W_Array(SigMode,channel,buffer1,0); 
		//		delay_ms(6);
		//		tmp=SSD2828_R_Reg(SigMode,channel,0xFF);	
		//		buffer[4]=tmp;
		//		buffer[5]=tmp>>8;	
		////--------------------------------------------------------------		
		//		delay_ms(3000);			
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
		delay_ms(15);			

		SSD2828_W_Array(SigMode,channel,PAGE4,0);	
		buffer1[0] = 0x02;
		buffer1[1] = 0x6F;
		buffer1[2] = 0x04;
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		//----------------------------------------------------------
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080); 
		SSD2828_W_Reg(SigMode,channel,0xBC,0x0001); 
		SSD2828_W_Reg(SigMode,channel,0xC1,0x0002); //return package  
				 
		buffer1[0] = 0x01;
		buffer1[1] = 0xC9;
		SSD2828_W_Array(SigMode,channel,buffer1,0); 
		delay_ms(6);
		tmp=SSD2828_R_Reg(SigMode,channel,0xFF);	
		buffer[4]=tmp;
		buffer[5]=tmp>>8;	

		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
		delay_ms(6);
		//-----------------	leave deep standby-----------------
		buffer1[0] = 0x02;
		buffer1[1] = 0xC3;
		buffer1[2] = 0xAB;
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x02; 
		buffer1[1] = 0x6f;
		buffer1[2] = 0x09;
		SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x01; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(120);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0x6f; 
		buffer1[2] = 0x09; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);		
		//------------------Write Enable(Manul 01)----------------------		
		buffer1[0] = 0x02; 
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x06; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);				
		buffer1[0] = 0x02; 	
		buffer1[1] = 0x6f; 
		buffer1[2] = 0x09; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x01; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(120);	
		buffer1[0] = 0x02; 	
		buffer1[1] = 0x6f; 		
		buffer1[2] = 0x09; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		//------------------Write Status(Manual 02)-------------------------	
		buffer1[0] = 0x02; 
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x01; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0x6f; 
		buffer1[2] = 0x07; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x02; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0x6f; 
		buffer1[2] = 0x09; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x02; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(120);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0x6f; 
		buffer1[2] = 0x09; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		//------------------Write Enable(Manul 01) [06h]---
		buffer1[0] = 0x02; 
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x06; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);		
		buffer1[0] = 0x02; 
		buffer1[1] = 0x6f; 
		buffer1[2] = 0x09; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);		
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x01; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(120);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0x6f; 
		buffer1[2] = 0x09; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC3; 
		buffer1[2] = 0x00; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		//------------------Start Flash Auto Program--------
		SSD2828_W_Array(SigMode,channel,REG_C8,0);
		delay_ms(5500);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0x6f; 
		buffer1[2] = 0x08; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);			
		//	  buffer1[1] = 0xC9; 
		//	  buffer1[2] = 0x00; 		
		//	  SSD2828_W_Array(SigMode,channel,buffer1,0);
		//--------------QPP_RELOAD_Check--------------------
		SSD2828_W_Array(SigMode,channel,PAGE4,0);	
		delay_ms(5);
		buffer1[0] = 0x02; 		
		buffer1[1] = 0x6f; 
		buffer1[2] = 0x04; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,REG_C3_1,0);	
		delay_ms(5);
		buffer1[0] = 0x02; 		
		buffer1[1] = 0x6f; 
		buffer1[2] = 0x01; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);			
		SSD2828_W_Array(SigMode,channel,REG_C3_2,0);
		delay_ms(5);
		buffer1[0] = 0x02; 
		buffer1[1] = 0x6f; 
		buffer1[2] = 0x03; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		buffer1[0] = 0x02; 		
		buffer1[1] = 0xC9; 
		buffer1[2] = 0x03; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
		delay_ms(500);		
		buffer1[0] = 0x02; 	
		buffer1[1] = 0x6f; 
		buffer1[2] = 0x04; 		
		SSD2828_W_Array(SigMode,channel,buffer1,0);	
//-----------------------------------------------------------------
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080); 
		SSD2828_W_Reg(SigMode,channel,0xBC,0x0001); 
		SSD2828_W_Reg(SigMode,channel,0xBD,0x0000); 
		SSD2828_W_Reg(SigMode,channel,0xC1,0x0002); //return package  					 
		buffer1[0] = 0x01;
		buffer1[1] = 0xC9;
		SSD2828_W_Array(SigMode,channel,buffer1,0); 
		delay_ms(6);
		//SSD2828_W_Cmd(SigMode,channel,0xFF);
		for(i=0;i<5;i++)
		{
			//SSD2828_W_Cmd(SigMode,channel,0xFA);		
			tmp=SSD2828_R_Reg(SigMode,channel,0xFF);
			buffer[4]=tmp>>8;
			buffer[5]=tmp;
			delay_ms(5);
			i++;
		}
		//----------------------------------------------------
    SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
}


void NT37700C_Show(USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8* buffer,u16 LP_B7_Data,u16 HS_B7_Data)
{
	u8 PAGE4[7] = {0x06,0xF0,0x55,0xAA,0x52,0x08,0x04};
	u8 REG_D0[7] = {0x06,0xD0,0x00,0x1F,0x00,0x00,0x80};
	u8 buffer1[8]; 
	u16 tmp;

	SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data);
	delay_ms(15);	
	buffer1[0] = 0x01; 
	buffer1[1] = 0x10; 			
	SSD2828_W_Array(SigMode,channel,buffer1,0);			
	buffer1[0] = 0x01; 
	buffer1[1] = 0x28; 			
	SSD2828_W_Array(SigMode,channel,buffer1,0);
	SSD2828_W_Array(SigMode,channel,PAGE4,0);
	buffer1[0] = 0x02; 
	buffer1[1] = 0xc2; 
	buffer1[2] = 0x54; 		
	SSD2828_W_Array(SigMode,channel,buffer1,0);	
//		buffer1[0] = 0x02; 
//	  buffer1[1] = 0xc2; 
//	  buffer1[2] = 0x54; 		
//	  SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x03; 
	  buffer1[1] = 0xB1; 
	  buffer1[2] = 0x04; 	
	  buffer1[3] = 0xC1; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x02; 
	  buffer1[1] = 0x6F; 
	  buffer1[2] = 0x09; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);
		buffer1[0] = 0x05; 
	  buffer1[1] = 0xB1; 
	  buffer1[2] = 0xF0; 	
	  buffer1[3] = 0x47; 		
	  buffer1[4] = 0x13; 	
	  buffer1[5] = 0x00; 			
	  SSD2828_W_Array(SigMode,channel,buffer1,0);	
		SSD2828_W_Array(SigMode,channel,REG_D0,0);
//--------------------------------------------------------		
		buffer1[0] = 0x01; 
	  buffer1[1] = 0x11; 			
	  SSD2828_W_Array(SigMode,channel,buffer1,0);		
		
//SETSRAMWADDR 	0x2C	
//SETSRAMCWADDR	0x3C	
//		
//SETSRAMRADDR	0x2E	
//SETSRAMCRADDR	0x3E	
//BMPLD	"D:\MY_Project\NT37700C\GVO\Demura\Demura\L64.bmp"			
			
		delay_ms(150);	
		buffer1[0] = 0x01; 
	  buffer1[1] = 0x29; 			
	  SSD2828_W_Array(SigMode,channel,buffer1,0);		
		delay_ms(120);				
		
//		buffer1[0] = 0x02; 
//	  buffer1[1] = 0x0A; 
//	  buffer1[2] = 0x9C; 		
//	  SSD2828_W_Array(SigMode,channel,buffer1,0);		
		SSD2828_W_Array(SigMode,channel,PAGE4,0);
		buffer1[0] = 0x02; 
	  buffer1[1] = 0x6F; 
	  buffer1[2] = 0x02; 		
	  SSD2828_W_Array(SigMode,channel,buffer1,0);
		
		SSD2828_W_Reg(SigMode,channel,0xB7,LP_B7_Data|0x0080); 
		SSD2828_W_Reg(SigMode,channel,0xBC,0x0001); 
		SSD2828_W_Reg(SigMode,channel,0xC1,0x0002); //return package  
					 
		buffer1[0] = 0x01;
		buffer1[1] = 0xC2;
		SSD2828_W_Array(SigMode,channel,buffer1,0); 
		delay_ms(6);
		tmp=SSD2828_R_Reg(SigMode,channel,0xFF);
		buffer[4]=tmp;
		buffer[5]=tmp>>8;
		delay_ms(5);
		
    buffer[0]=0x4E;	
		buffer[1]=0x23;
//		buffer[2]=0x09;
		//buffer[4] = Uart_Error_None;
    SSD2828_W_Reg(SigMode,channel,0xB7,HS_B7_Data);
    STM2PC_RM671xx(pdev,CDC_IN_EP,buffer,buffer[2]+3); 	  
}


void ProcessForIc4E( USB_OTG_CORE_HANDLE *pdev,uint8_t  ep_addr,u8 SigMode ,u8 channel,u8 buffer[],u16 LP_B7_Data,u16 HS_B7_Data)
{	
	switch(buffer[1])
	{
    case 0x01:                                      //写寄存器
         NT37700C_Write_Register(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);break;	
    case 0x02:                                      //读寄存器
         NT37700C_Read_Register(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);break;	
    case 0x03:                                      //自动gamma写
         NT37700C_Gamma_Update(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);break;			
    case 0x08:                                      //写Gamma数据    
         NT37700C_Write_Gamma(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);break;
    case 0x09:                                      //读Gamma数据
         NT37700C_Read_Gamma(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);break; 
		case 0x0D://OTP Gamma
         NT37700C_Gamma_OTP_Start(pdev,ep_addr,SigMode,channel,buffer,LP_B7_Data,HS_B7_Data);  break;

    default:	break;	
	}	
}


